A wide variety of electronic systems use memory chips such as dynamic-random-access memory (DRAM). DRAM chips are often soldered to small daughter-cards to form memory modules. Personal computers (PC's) use memory modules as the main memory on the PC motherboard. Memory modules are built to meet specifications set by industry standards, thus ensuring a wide potential market. High-volume production and competition have driven module costs down dramatically, benefiting buyers of a wide variety of electronic systems.
Memory modules are made in many different sizes and capacities, such as older 30-pin and 72-pin single-inline memory modules (SIMMs) and newer 168-pin, 184-pin, and 240-pin dual inline memory modules (DIMMs). The “pins” were originally pins extending from the module's edge, but now most modules are leadless, having metal contact pads or leads. The modules are small in size, being about 3-5 inches long and about an inch to an inch and a half in height.
The modules contain a small printed-circuit board substrate, typically a multi-layer board with alternating laminated layers of fiberglass insulation and foil or metal interconnect layers. Surface mounted components such as DRAM chips and capacitors are soldered onto one or both surfaces of the substrate.
FIG. 1 shows an illustration of a fully-buffered memory module. Memory module 10 contains a substrate such as a multi-layer printed-circuit board (PCB) with surface-mounted DRAM chips 22 mounted to the front surface or side of the substrate, as shown in FIG. 1, while more DRAM chips 22 are mounted to the back side or surface of the substrate (not shown). Memory module 10 could be a fully-buffered dual-inline memory module (FB-DIMM) that is fully buffered by an Advanced Memory Buffer (AMB) chip (not shown) on memory module 10. The AMB chip uses differential signaling and packets to transfer data at high rates.
Memory modules without an AMB chip are still being made. Such unbuffered memory modules carry address, data, and control signals across metal contact pads 12 from the motherboard directly to DRAM chips 22. Some memory modules use simple buffers that buffer or latch some of these signals but do not use the more complex serial-packet interface of a FB-DIMM.
Metal contact pads 12 are positioned along the bottom edge of the module on both front and back surfaces. Metal contact pads 12 mate with pads on a module socket to electrically connect the module to a PC's motherboard. Holes 16 are present on some kinds of modules to ensure that the module is correctly positioned in the socket. Notches 14 also ensure correct insertion of the module. Capacitors or other discrete components are surface-mounted on the substrate to filter noise from the DRAM chips 22.
Some memory modules include a serial-presence-detect electrically-erasable programmable read-only memory (SPD-EEPROM) on the memory module substrate. SPD-EEPROM 130 stores configuration information for the memory module, such as speed, depth, and arrangement of the memory on the memory module.
A memory-module tester may be constructed from a personal computer PC motherboard. See for example U.S. Pat. Nos. 6,357,022, 6,351,827, and 6,742,144. However, individual DRAM chips are normally pre-tested before soldering to a memory module. Special chip-testing machines such as an automated-test-equipment (ATE) machine are often used for testing DRAM chips.
Since the memory module tester is constructed from an inexpensive PC motherboard, the cost of the tester is several orders of magnitude smaller than the cost of a million-dollar automated-test-equipment (ATE) machine. Thus test costs are significantly reduced by using a PC-motherboard-based tester.
DRAM chips may have a very large capacity, such as 512 Mbits, or half a giga-bit. The large number of memory cells, small size of individual memory cells, and overall large area of the DRAM die cause manufacturing defects to be somewhat common. DRAM chips are tested on a wafer before being separated and packaged, but this wafer-sort test may not catch all defects.
Thus some packaged DRAM chips are going to contain defects. Further testing of packaged DRAM chips may be performed cost-effectively at higher speeds, allowing defective DRAM chips to be identified and discarded. Manufacturers may build DRAM chips into memory modules, then perform testing on a low-cost memory module tester constructed from a PC motherboard.
FIG. 2 shows a memory map of a PC motherboard with a test socket for testing memory modules at a low address. The memory space of the microprocessor on a PC motherboard has the basic input-output system (BIOS) mapped to the highest addresses in the memory space. The BIOS code may be read from a read-only memory (ROM) and copied to a memory module inserted into DRAM module slot 566 during booting. Later in the boot process, an image of the operating system (OS) is loaded into the lowest addresses in the memory space, in DRAM module slot 562.
A special test program used by the memory module manufacturer can be loaded into the memory module in DRAM module slot 562 after booting. DRAM module slot 562 can have installed in it a memory chip under test that has been inserted into test socket 560 on a test adaptor board, rather than a memory module installed on the PC motherboard. However, when the memory chip under test is faulty, defect 56 may occur in the test program or in the OS image, causing the PC motherboard to crash. Ideally, defect 56 is not in the memory portion assigned to DRAM module slot 562 that contains the OS image, but in another portion tested by the test program in DRAM module slot 562. Then the test program may crash, or it may report the failure.
However, when defect 56 in the memory modules device under test occurs in the portion of DRAM module slot 562 that contains the OS image, the PC motherboard is likely to crash during booting or just after booting. This is less desirable, since the test program cannot report the location of the faulty memory. The test system can still detect the error by the motherboard crashing, and can discard the memory chip under test in test socket 560.
FIG. 3 shows a memory map of a PC motherboard with a test socket for testing memory modules at a high address. Rather than connect test socket 560 to low addresses of DRAM module slot 562, test socket 560 is connected to the terminals for DRAM module slot 566 on the motherboard. The memory chip under test then contains the highest memory addresses in the PC.
Since the BIOS is copied to DRAM module slot 566, the BIOS is copied to the memory chip under test. Should a faulty DRAM location occur where the BIOS is loaded, the PC motherboard may crash during booting before the test program is executed. This is undesirable since the exact location of defect 56 within the memory chip under test cannot be readily determined. However, the test system can still detect the error by the motherboard crashing, and can discard the memory chip under test in test socket 560.
It is often desirable to find the exact location of the defect within a memory module. For example, if the defect location is known, then the DRAM memory chip containing this defect can be removed from the memory module substrate, and a new DRAM chip can be soldered onto the memory module in a rework process. This rework process can save the defective memory module. Moreover, as a DRAM chip tester, it is important to determine which DRAM chip is failing among the DRAM chips in the memory module. Many DRAM chips can be tested at the same time within the memory module. The failing DRAM chip can be sorted as bad part and the passing DRAM chip as good part.
Diagnosis of faults may be desired during development, such as to determine the cause of the fault. Statistics may be generated of fault locations to determine if a certain part of the memory module design is weak. A re-design of the memory module may then improve manufacturing yields.
What is desired is a PC motherboard tester that can determine the location of a defect in a faulty memory module. A motherboard tester that does not crash when a faulty memory module is being tested is desirable. A motherboard tester that can isolate a faulty memory location using a test program is desirable. It is further desired to test individual DRAM chips on such a test system that is modified to accept individual DRAM chips on a test adaptor board.